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INTEGRATED CIRCUITS
DATA SHEET
TDA7040T Low voltage PLL stereo decoder
Product specification File under Integrated Circuits, IC01 September 1986
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
GENERAL DESCRIPTION
TDA7040T
The TDA7040T is a monolithic integrated circuit for low cost FM stereo radios with an absolute minimum of peripheral components and a simple lay-out. Features * Built-in four pole low pass filter with a 70 kHz corner frequency suppressing unwanted out-of-band input signals * Fully integrated 228 kHz oscillator * Pilot presence detector and soft mono/stereo blend * Built-in interference suppression * External stereo lamp driver applicable * Adjustable gain. QUICK REFERENCE DATA PARAMETER Supply voltage (pin 4) Supply current VP = 3 V Total harmonic distortion Signal to noise ratio Channel separation PACKAGE OUTLINE 8-lead mini-pack; plastic (S08; SOT96A); SOT96-1; 1996 July 24. IP THD S/(S + N) SYMBOL VP - - - - MIN. 1,8 - 3 0,3 70 40 TYP. 6 - - - - MAX. V mA % dB dB UNIT
September 1986
2
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
TDA7040T
Fig.1 Block diagram.
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) PARAMETER Supply voltage range Operating ambient temperature Storage temperature range SYMBOL VP Tamb Tstg - -10 -55 MIN. - - - TYP. 7 + 70 + 150 MAX. V C C UNIT
September 1986
3
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
CHARACTERISTICS VP = 3 V; Tamb = 25 C; test circuit Fig.2; unless otherwise specified PARAMETER Supply voltage (pin 4) Supply current Output voltage (r.m.s. value) Vi(rms) L and R 120 mV; f = 1 kHz Channel balance Vi(rms) L and R 40mV; f = 1 kHz Output resistance Total harmonic distortion Vi(rms) L and R 40 mV; f = 1 kHz Total harmonic distortion Vi(rms) L and R 40 mV; f = 1 kHz; Vp(rms) = 12 mV Signal-to-noise ratio Vi(rms) = 120 mV; f = 1 kHz Signal-to-noise ratio Vi(rms) = 120 mV; f = 1 kHz Vp(rms) = 12 mV Channel separation Vi(rms) L and R 40 mV; f = 1 kHz; Vp(rms) = 12 mV Capture range Vp(rms) = 12 mV; deviation from centre frequency Carrier leak Vi(rms) L and R 120 mV; Vp(rms) = 12 mV; f = 1 kHz; f = 19 kHz f = 38 kHz SCA (Subsidiary Communications Authorization) rejection Vi(rms) L and R 120 mV; Vp(rms) = 12 mV; f = 1 kHz; VSCA(RMS) = 12 mV; f = 67 kHz 67 - 70 - - - 30 50 - - f - 3 - - 40 - S/(S + N) - 70 - S/(S + N) - 70 - THD - 0,3 - THD - 0,1 - Gv RO - - 0 5 1 - V5, 6-1 - 240 - IP SYMBOL VP - MIN. 1,8 3 TYP. 3,0 4
TDA7040T
MAX. 6,0 V
UNIT mA
mV
dB k
%
% dB
dB
dB
%
dB dB
dB
September 1986
4
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
TDA7040T
PARAMETER ACI (Adjacent channel interference) Vi(rms) L and R 120 mV; Vp(rms) = 12 mV; f = 1 kHz; VACI(RMS) = 1,3 mV; f = 114 kHz VACI(RMS) = 1,3 mV; f = 190 kHz Traffic radio (V.W.F.) suppression V o ( signal ) ( at 1 kHz ) 57 ( VWF ) = ------------------------------------------------------------------------------------V o ( spurious ) ( at 1 kHz 23 Hz ) measured with: 91% stereo signal; fm = 1 kHz; 9% pilot signal; 5% traffic subcarrier (f = 57 kHz, fm = 23 Hz AM, m = 60%)
SYMBOL
MIN.
TYP.
MAX.
UNIT
114 119 57(VWF)
- - -
90 85 75
- - -
dB dB dB
Fig.2 Test circuit.
September 1986
5
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
TDA7040T
Fig.3 Application diagram in combination with TDA7021T and TDA7050T.
September 1986
6
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
CHARACTERISTICS
TDA7040T
Of the combination TDA7021T, TDA7040T and TDA7050T (Fig.3). Conditions unless otherwise specified: Vvhf(rms) = 1 mV; fhf = 97 MHz; fdev = 22,5 kHz; fdev pilot = 6,75 kHz; noise measured unweighted in a range from 400 Hz to 15 kHz. PARAMETER Total harmonic distortion (pilot on) Vi = (L + R) signal; fmod = 1 kHz Vi = L signal; fmod = 1 kHz Signal to noise ratio Vi = (L + R) signal; fmod = 1 kHz pilot off pilot on Channel separation Vi = L-signal, fmod = 1 kHz; pilot on; fRF = 97 MHz Vi = L-signal, fmod = 1 kHz; pilot on; fRF = 87,5 MHz and 108 MHz Output voltage (pilot off) Vi = (L + R) signal, fmod = 1 kHz Vo(rms) - 80 - mV - 14 - dB - 26 - dB S/(S + N) S/(S + N) - - 56 50 - - dB dB THD THD - - 0,5 1,0 - - % % SYMBOL MIN. TYP. MAX. UNIT
a = measured in test circuit (Fig.2) b = measured in application diagram (Fig.3)
Fig.4 Channel separation as a function of audio frequency.
September 1986
7
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
TDA7040T
Fig.5
Signal/noise and channel separation behaviour in Fig.3. at R1 = 270 k and R2 = 13 k; without diode BAW62.
Fig.6
Signal/noise and channel separation behaviour in Fig.3. at R1 = 200 k, R2 = 30 k; with diode BAW62.
September 1986
8
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm
TDA7040T
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03S JEDEC MS-012AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-05-22
September 1986
9
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end.
TDA7040T
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
September 1986
10
Philips Semiconductors
Product specification
Low voltage PLL stereo decoder
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA7040T
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
September 1986
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